| Comments | |||||||||
| 1) Barrels (Layers) of the SVT are numbered 1 (inner), 2 (middle) and 3 (outer) | |||||||||
| 2) Ladder numbers end with the ladder which is vertical and on top; the outer barrel ladders are | |||||||||
| numbered 1-16, middle 1-12, inner 1-8. The labels on the ladders in the following worksheets | |||||||||
| include a "W" or "E" to indicate the West or East side of the same ladder for electrical | |||||||||
| connections only, but relate to the same physical ladder. | |||||||||
| 3) Wafers are numbered from East to West; outer 1-7, middle 1-6, inner 1-4 | |||||||||
| 4) hybrids are numbered 1 and 2, numbered clockwise when looking from West | |||||||||
| 5) each hybrid has 3 analog channels, labeled 1,2,3 | |||||||||
| 6) each ladder is connected to 1 transition board on each end of the ladder | |||||||||
| 7) Each end of the ladder has 3 cables connecting it to a transition board: 2 attach to the flex | |||||||||
| cables from the electronics carriers, 1 connects to the HV interface board. | |||||||||
| 8) Each transition board has 2 connectors to the ladders, labeled "L" and "R", with pins labeled | |||||||||
| LA1 through LA12 and RA1 through RA12 | |||||||||
| 9) Each Readout System is connected to 3 transition boards, labeled T1, T2, T3 | |||||||||
| 10) Each Readout System has five Analog Mutliplexing boards in it, labeled AMB1 through AMB5 | |||||||||
| 11) Each AMB has 12 ADC channels, labeled C1 through C12 | |||||||||
| 12) The data transmission between readout systems and receiver boards is via a fiber connection, | |||||||||
| which transmits the data in sequence, one 20-bit word at a time, sequences numbered 0,1,2,.… | |||||||||
| 13) Each sequence contains 2 ADC words in it labeled "L" and "M" | |||||||||
| 14) "M"ost significant bits are bits D19-D10, "L"east significant D9-D0 at the HP Gigalink | |||||||||
| 15) Each receiver has 18 ASICs labeled A0 through A5, B0 through B5, C0 through C5 | |||||||||
| 16) 6 ASICs feed data to one i960 processor for cluster finding; the i960s are labeled A,B,C | |||||||||
| 17) VRAM offsets are relative to the receiver board VME address. | |||||||||
| Last Changed: | 8/27/99 | ||||||||